1. Technical Field of the Invention
The present invention relates to monitoring electrical signals, and particularly to a circuit and method for monitoring voltage supply levels provided to an integrated circuit chip.
2. Description of the Related Art
Advancements in the semiconductor industry have led to increased demands for circuit performance. In an effort to more tightly control operating conditions so as to meet the increased demands placed on integrated circuitry, some existing integrated circuitry monitor power supply levels, such as the voltage supply level from an unregulated power supply, so as to detect instances in which the power supply level falls below a predetermined level, such as a predetermined minimum voltage level.
One existing power supply monitor circuit is shown in FIG. 1. An unregulated voltage is generated from a voltage divider of an unregulated power supply. A comparator C compares the unregulated voltage to a predetermined voltage reference Vref. The comparator C asserts a power fail signal OUT in the event the unregulated voltage falls below the predetermined voltage reference Vref. The power fail signal OUT may be, for example, provided to a processor or other controller device (not shown). Upon the power fail signal OUT being asserted, the processor/controller device may take appropriate remedial action, such as switching to a battery backup supply.
One problem with existing power supply monitor circuits, such as the existing power supply monitor circuitry of FIG. 1, is in monitoring a relatively slowly changing unregulated power supply. For instance, a slowly changing unregulated voltage at or near the predetermined reference voltage Vref may cause comparator C to oscillate. As can be seen, oscillation of comparator C may cause the corresponding processor/controller device to attempt repeated remedial measures and/or otherwise disrupt the operation of the system. Based upon the foregoing, there is a need for a monitor circuit that substantially suppresses oscillation effects.
Embodiments of the present invention overcome shortcomings in existing power supply monitor circuits and satisfy a significant need for a substantially oscillation-free monitor circuit. A monitor circuit according to first embodiment of the present invention includes a comparator for comparing an electrical signal, such as a power supply signal, with a voltage reference signal and generating an output based upon the comparison. The monitor circuit further includes a first circuit having an input coupled to the output of the comparator and an output signal that is driven to a first logic state upon the output of the comparator being in the same logic state substantially entirely over a predetermined period of time. In this way, the output of the monitor circuit will not transition to the first logic state until the output of the comparator is stable in the logic state over the predetermined time period, thereby preventing oscillation of and/or noise appearing on the output signal of the monitor circuit.